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Source file component_intf.ml
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sequential digital logic. A component is stateless if it is purely combinational, and
stateful if modeling sequential logic.
A component has two main functions:
- an [output] function that returns the output of the component based on an input and
the current state.
- an [update_state] function that updates the state based on an input and
the current state.
A component is a first class module that can be implemented in any number of ways:
- a hardware description
- an OCaml module implementing [Component.S]
- using [Step_monad]
- [Component] combinators, like: [sequence], ... *)open!BasemoduleCombinational=structmoduletypeS=sigmoduleInput:Data.SmoduleOutput:Data.Stypet[@@derivingsexp_of]valt:tvalcreated_at:Source_code_position.tvaloutput:t->Input.t->Output.tendtype('i,'o)t=(moduleSwithtypeInput.t='iandtypeOutput.t='o)endmoduleModule=structmoduletypeS=sigmoduleInput:Data.SmoduleOutput:Data.Stypet[@@derivingsexp_of]valt:tvalcreated_at:Source_code_position.tvaloutput:t->Input.t->Output.tvalupdate_state:?prune:bool->t->Input.t->unitvalprune_children:t->unitvalhas_children:t->boolendendmoduleM(Input_monad:Monad.S)=structmoduletypeS=sigmoduleInput_monad:Monad.Swithtype'at='aInput_monad.t(** [t] is mostly abstract, but we expose is as a constructor so that the type checker
knows that [t] is injective. *)type('i,'o)t_type('i,'o)t=Tof('i,'o)t_[@@derivingsexp_of]type('i,'o)t_module=(moduleModule.SwithtypeInput.t='iandtypeOutput.t='o)valsexp_of_input:('i,_)t->'i->Sexp.tvalsexp_of_output:(_,'o)t->'o->Sexp.tvalinput_module:('i,_)t->'iData.tvaloutput_module:(_,'o)t->'oData.tvalcreate:('i,'o)t_module->('i,'o)t(** [output] returns the output based on an input and its current state, but does not
update the state. A component is called "combinational" if [output t i] ignores
[t]. A component is called "sequential" if [output t i] uses [t]. A sequential
component is called a "moore machine" if it ignores [i] and a "mealy machine" if it
uses [i]. *)valoutput:('i,'o)t->'i->'o(** [update_state] updates [t]'s state based on an input and its current state *)valupdate_state:?prune:bool->('i,_)t->'i->unit(** [run_with_inputs t is] runs [length is] steps with [t], on each step calling
[update_state] and then [output], pairing the input of that step with the output. *)valrun_with_inputs:('i,'o)t->'ilist->('i*'o)list(** Remove all children that has finished *)valprune_children:('i,'o)t->unit(** Whether the component has any children *)valhas_children:('i,'o)t->boolmoduleNext_input:sigtype'it=|Finished|Inputof'i[@@derivingsexp_of]endvalrun_until_finished:?show_steps:bool(** default is [false] *)->('i,'o)t->first_input:'i->next_input:('o->'iNext_input.tInput_monad.t)->unitInput_monad.t(** {2 Component combinators} *)valsequence:('a,'b)t->('b,'c)t->('a,'c)tvalmap_input:('i2,'o)t->'i1Data.t->f:('i1->'i2)(** a pure function *)->('i1,'o)tvalmap_output:('i,'o1)t->'o2Data.t->f:('o1->'o2)(** a pure function *)->('i,'o2)t(** {2 Combinational components} *)moduleCombinational=Combinationalvalcreate_combinational:('i,'o)Combinational.t->('i,'o)tvaland_:(bool*bool,bool)tvalor_:(bool*bool,bool)tvalnot_:(bool,bool)t(** {2 Sequential components} *)valflip_flop:unit->(bool,bool)tmoduleFlip_flop_with_load_enable:sigmoduleInput:sigtypet={input:bool;load_enable:bool}includeData.Swithtypet:=tendmoduleOutput=Data.Boolvalcreate:unit->(Input.t,Output.t)tendmoduleFlip_flop_with_load_enable_and_reset:sigmoduleInput:sigtypet={input:bool;load_enable:bool;reset:bool}includeData.Swithtypet:=tendmoduleOutput=Data.Boolvalcreate:unit->(Input.t,Output.t)tendendendmoduletypeComponent=sigmoduleModule=ModulemoduleM=MmoduleMake(Input_monad:Monad.S):M(Input_monad).Send