package hardcaml_verilator
Install
Dune Dependency
Authors
Maintainers
Sources
sha256=76f944f35c445eeb3028ff9e73dcdf1778937078ad655c1e949278d23d888251
doc/hardcaml_verilator/Hardcaml_verilator/index.html
Module Hardcaml_verilatorSource
Verilator backend for Hardcaml cycle simulations.
While this performs faster than Hardcaml's Cyclesim, it takes a longer time to elaborate the design (a ~3_000 LoC verilog file takes around 2 seconds, whilist hardcaml's Cyclesim takes 0.1 second). The default is to run it in non-thread safe mode (ie: single threaded w/o atomics / locks), which is the preferred option for small designs. The create and With_interface.create functions do the following:
0. Generates the verilog file of the circuit 1. Calls verilator to generate C++ file for simulation 3. Generates C-wrapper for accessing fields in the C++ data structure 4. Compiles the generated C++ file and C-wrapper to make a shared library 5. Dyanmically load the shared library back to the same executable and bind the > functions using C-types 6. Create a Cyclesim.t instance by supplying the relevant functions with bindings to > verilator
type internal_port = {signal : Hardcaml.Signal.t;bits : Hardcaml.Bits.Mutable.t;update : unit -> unit;aliases : string list;
}type t = {input_setters : (string, input_port) Core.List.Assoc.t;output_getters : (string, output_port) Core.List.Assoc.t;internal_getters : (string, internal_port) Core.List.Assoc.t;eval : unit -> unit;complete : unit -> unit;
}type 'a with_options =
?cache:Cache.t ->
?build_dir:string ->
?verilator_config:Config.t ->
?config:Hardcaml.Cyclesim.Config.t ->
'aArguments when creating a verilator simulation object.
cachespecifies whether and where to store compiled shared libraries. When set to a directory, thecreatefunctions below first tries to check if an existing compilation for the current circuit exists in the specified directory. When set to a file, the file is used directly as the shared library. This can speed up compilation for repeated simulation runs.build_dirspecifies the build directory. Defaults to somewhere in /tmp.optimizationsspecifies whether verilator optimizations should be turned on.parallel_compilespecifies whether the verilator simulation object should be compiled in parallel, and if so with how many parallel jobs.threadsspeficies whether the verilator simulation object should be generated to be run in parallel, and if so with how many parallel threads.versionspecifies which major version of verilator we want to use.
val create :
(clock_names:string list ->
Hardcaml.Circuit.t ->
Hardcaml.Cyclesim.t_port_list)
with_options